DEEP-EST introduces two innovative memory concepts: persistent, byte-addressable memory (Intel(r) OptaneTM Datacenter Persistent Memory) is connected to the CPU memory controllers and works at 20 - 30% of DRAM performance. Applications store results or temporary data, or use an automatic caching scheme to see a huge memory space with DRAM as a memory-side cache. Each DAM node will have 2 TBytes of such memory. Secondly, the Network Attached Memory takes up a result of DEEP-ER, significantly improving the implementation: a state-of-the-art FPGA makes 16 TBytes of persistent Flash memory available for RDMA operations carried across the EXTOLL network fabric.  The NAM uses DRAM to internally cache memory accesses, and can serve data at up to the EXTOLL network speed (100 Gb/s). NAM resources are managed by the SLURM scheduler, and applications can use the one-sided MPI API calls to allocate and access memory buffers shared between processes.


NVM and NAM as additional levels

Against this background, the DEEP-ER project integrates two innovative design approaches with the DEEP architecture: Non-Volatile Memory (NVM) devices attached to the compute nodes as well as Network Attached Memory (NAM). Both technologies will address the two key research areas of highly scalable parallel I/O and system resiliency. The project has implemented a tight co-design loop between hardware architects and designers and the software experts to ensure that the extended DEEP architecture can meet I/O performance and system resiliency requirements in the future.


Find out about our hardware team's experiments with innovative memory technologies. 

The NAM is connected to the DEEP-ER network and serves as a shared global storage resource.